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Memory Organization: Computer Architecture & Organization Class Notes

Updated: Oct 22, 2022

Mobiprep has created last-minute notes for all topics of Computer Architecture & Organisation to help you with the revision of concepts for your university examinations. So let’s get started with the lecture notes on Computer Architecture & Organisation.

Our team has curated a list of the most important questions asked in universities such as DU, DTU, VIT, SRM, IP, Pune University, Manipal University, and many more. The questions are created from the previous year's question papers of colleges and universities.

Memory Organization

Question 1) Explain various characteristics of memory devices?

Answer) The following are the main characteristics of memory devices:


The capacity of a memory device refers to the number of bytes of data it can store.

Access Method

The access method indicates the order in which the memory locations are accessed. The different types of access methods are :

  1. Random access

  2. Sequential access

  3. Direct access

  4. Associative access


The memory device can be stored in one of the following three locations:

  1. CPU

  2. Internal memory (or) main memory

  3. External memory (or) secondary memory

Unit of Transfer

The unit of data transfer indicates the amount of data that can be transferred from the main memory at a time.


The memory access time, cycle time and transfer rate decide the performance of the memory device.

Physical Type

The physical type indicates the material with which the memory device is made. The memory device may be made of semiconductors or magnetic materials.

Physical Characteristics

The memory device may be volatile or non-volatile.

  • Volatile memory

If the memory device holds the data only when the device is powered, it is called volatile memory. Such devices lose their data when the power if OFF.

  • Non-volatile memory

If the memory device retains its memory even when the power is off, it is called non-volatile memory.


  • Erasable memory

The data can be erased from the memory easily.

Example: RAM

  • Non-erasable memory

The data cannot be erased from the non-erasable memory. Such memory devices can be programmed only once.

Example: ROM


Question 2) Explain various memory access methods?

Answer) The different memory access methods are:

Random access

In random access, the memory locations are accessed randomly. Each location in the memory is accessed in a constant time.

Sequential access

In sequential access, the memory locations are accessed one by one from the first location. The access time of a memory address is dependent on it’s location.

Direct access

The direct access method is also called the sequential random access. It is the combination of both sequential and random access methods. Here, the memory location is accessed directly.

Associate access

In associate access, instead of searching for a memory location, a word is searched.


Question 3) What do you understand by memory access time?

Answer) The memory access time is the time taken by the CPU to access the memory. The memory access time is given by the formula:

Memory access time = Hit time + Miss Rate * Miss Penalty

Usually, the memory access time involves the time taken to access the cache, and if miss occurs, it also involves the time taken to access the memory.


Question 4) Write down the memory hierarchy list.

Answer) The memory hierarchy is designed in such a way that the access time is the least at the top of the pyramid and the highest at the base of the pyramid.

memory hierarchy list in CAO class notes
Memory Hierarchy List


Question 5) What do you understand by semi-conductor memory?

Answer) A memory device made of semiconductor devices is called semiconductor memory. The memory cells are made of active components like BJT and MOS transistors.

It consists of ‘n’ address lines and ‘m’ data lines. It has a capacity of 2nxm bits.


Question 6) State the difference between RAM and ROM.




It is volatile.

It is non-volatile.

Allows both read and write operation on the data

Allows read operation only

It is used for temporary storage of data.

It is used for permanent storage of data.

More expensive

Less expensive






Question 7) How SRAM is different from DRAM? Draw and explain the significance of a 512 x 8 ram chip and similar sized rom chip with all notations.




SRAM is made of bi-stable latches.

DRAM is made of capacitors.

Recharging is not required.

Frequent recharging of the capacitor is required to maintain the data.

It is more expensive than DRAM

It is less expensive.



It is faster than DRAM

It is slower than SRAM

Cache memory is made of SRAM

Main memory is made of DRAM

Less dense

More dense

SRAM structure

DRAM Structure

512x8 RAM chip

512x8 RAM chip in CAO class notes

The CS1 and CS2 are the two chip select lines to select the required memory chip. The read and write lines are used to read and write the data to the memory respectively. The 9-bit address line is used to access the required memory location. The address bus is unidirectional.

512 x 8 RAM shows that 512 words can be stored in the memory, and each word is of 8-bit length.

The following is the functional table of the 512x8 RAM

functional table of the 512x8 RAM in CAO class notes
Functional table of the 512x8 RAM

512x8 ROM chip

512x8 ROM chip in CAO class notes

The 512x8 ROM is similar to that of 512x8 RAM, except that it has no read and write lines.

ROM can accommodate many memory cells than that of RAM. The 512x8 ROM is equivalent to 128x8 RAM in space.


Question 8) State the working of each of the following:

Answer) SDRAM

  • SDRAM – Synchronous Dynamic Random-Access Memory

  • SDRAM is much faster than the DRAM

  • SDRAM is synchronized to the processor’s clock signal.

  • As SDRAM is synchronized to the processor and the bus, it is efficient and fast.


  • Asynchronous DRAM is not synchronized to the processor’s clock signal.

  • The ADRAM is controlled by a separate controller in an asynchronous manner.

  • It is much slower than the SDRAM.

  • As it is controlled asynchronously, the memory access and response is slow.


  • DDR – Double Data-Rate SDRAM

  • DDR is faster than SDRAM.

  • The DDR operates on both the rising and falling edges of the clock signal. Hence, it is doubly faster than SDRAM.


  • RDRAM – Rambus DRAM

  • RDRAM has a high data transfer rate.

  • It is the fastest DRAM available.

  • The RDRAM module has a RAM, a bus, and a RAM controller.

  • It has a maximum speed of about 1GHz


  • CDRAM – Cached DRAM

  • It is a high speed DRAM which has a small cache

  • It has an on-chip cache memory (SRAM)

  • It is used as a high speed buffer.

  • It is used to provide high performance on low cost


Question 9) What are the features of ROM?


  1. ROM is non-volatile. The data is stored even when the device is not powered.

  2. Used for permanent storage of data.

  3. ROM is cheaper than RAM.

  4. Consumes less power.

  5. Refreshing the memory is not required.

  6. The data in ROM cannot be changed by the user. ROM is not erasable.


Question 10) What do you understand by mask programming?

Answer) If we want only a part of the memory word to be changed by the write operation, then we use memory masking. The bits which should not be affected are masked off. The data mask pin is used to mask certain bits in the memory. The masked bits are not changed by the write operation.


Question 11) Explain the properties of various types of ROM.

Answer) The following are the various types of ROM:


  • MROM - Masked ROM

  • In MROM, the software mask is burned into the memory during the manufacturing process.

  • The bit masking is done by the manufacturer.


  • PROM – Programmable ROM

  • In PROM, the data can be entered only once. The data is entered in the PROM by the PROM program by the user.


  • EPROM – Erasable and Programmable ROM

  • EPROM is a PROM which can be erased using Ultra-violet light.


  • EEPROM – Electrically Erasable and Programmable ROM

  • EEPROMs can be erased electrically any number of times.

  • EEPROM is more flexible in terms of data storage and deletion.


Question 12) What do you understand by memory cell?

Answer) The memory cell is the basic unit of a memory device. It stores one bit of binary data. A memory device is the collection of many memory cells.

An SRAM memory cell is made of 6 transistors as shown in the figure given below:

SRAM memory cell in CAO class notes
SRAM memory cell

A DRAM memory cell is made of a capacitor and a pas transistor as shown in the figure given below:

DRAM memory cell in CAO class notes
DRAM memory cell


Question 13) How many 128x8 ram chips are needed to provide a memory capacity of 2048 bytes?

Answer) A single 128x8 RAM can store 1024 bits or 128 bytes.

To store 2048 bytes, we need

2048128 = 16 chips

Hence, 16 RAM chips are required to provide a memory capacity of 2048 bytes.


Question 14) Explain content addressable memory?

Answer) The content addressable memory is also called associative memory. It is a special type of memory which searches for the input data by comparing it with the data available in the table. When a match occurs, it returns the corresponding address. As it searches for the content of the data rather than the address of the data, it is called content addressable memory. The CAM is usually used for high-speed search applications.


Question 15) With reference to cache memory, what do you understand by locality of reference?

Answer) The locality of reference states that the subsequent access to the memory will be near the recent memory accesses. It suggests that, when a memory location is accessed, it is better to bring its neighbors too into the cache memory. The locality of reference has three forms:

  • Temporal Locality

The recently accessed memory locations have higher chance of being accessed again in the near future.

  • Spatial Locality

When a memory location is accessed, there is a high probability of accessing its neighbors in the near future.

  • Sequential Locality

It states that the instructions are usually accessed sequentially.


Question 16) What is associative mapping?

Answer) In associate mapping, an entry in the memory can be placed (or mapped) anywhere within the cache memory. The data in the memory are not ordered. This is because, associative memory is used here. The associative memory stores the content and the address of the memory location. The word id is used to identify a word in the memory.

Associative mapping is the fastest and efficient method of mapping. It greatly increases the hit rate.


Question 17) What is set-associative mapping? draw and explain. state its merits and demerits.

Answer) In set associative mapping, the cache memory is divided into groups called ‘sets’. Unlike in direct mapping, here, two or more words in the main memory can occupy any line in the specified set.

The set-associative mapping combines both direct and associative mapping techniques.

The ‘tag’ field in the main memory address (physical address) is divided into ‘tag’ and ‘set offset’ in the set associative mapping.

 ‘tag’ field in the main memory address in CAO class notes

The set in the cache memory to which the given memory block can be mapped is given by:

Cache set number = (Main Memory Block Address) Modulo (Number of sets in Cache)

Cache memory in given memory block in CAO class notes


  • Set-associative mapping has a high hit rate.

  • The index required is small


  • Very expensive

  • More complex

  • Increased Hit time


Question 18) What is direct cache mapping? draw and explain. state its merits and demerits.

Answer) In direct mapping, a main memory block can be mapped to exactly one line in the cache memory. It is the simplest method of cache mapping.

In direct mapping, the ‘tag’ field in the physical address is divided into ‘tag’ and ‘line-offset’ fields. The ‘line offset’ is used to access a particular line in the cache memory.

Direct Mapping in CAO class notes

A block of main memory is mapped to a specific cache line using the formula:

Cache line number = ( Main Memory Block Address ) Modulo (Number of lines in Cache)

Cache line number in CAO Class notes

The multiplexers generate the physical address from the line number. For each tag value, there is a multiplexer. i.e. the number of tags and the number of multiplexers are equal. The multiplexer gives the selected tag number as output. This tag number is compared with the generated tag number using a comparator. If there is a match, then it is a hit. Else, it is a miss.


  • Simple and easy to implement

  • It is cheaper than the set-associative cache memory.

  • The tag memory required is very small.


  • Each block of main memory can be mapped to exactly one cache location.

  • it is not flexible.


Question 19) What is hit and miss ratio?

Answer) Hit ratio

The hit ratio describes the number of hits out of all the memory accesses made.

Hit Ratio =Number of hits / Number of hits + Number of misses

Miss ratio

The miss ratio describes the number of misses out of all the memory accesses made.

Miss Ratio =Number of misses / Number of hits + Number of misses

Hit Rate = 1 – Miss Rate


Question 20) What is page table?

Answer) Page table is a structure which stores the mapping between the virtual memory addresses and the physical memory addresses. It stores the frame number in the main memory for the corresponding page number in the virtual memory.


Question 21) What is page fault?

Answer) A page fault occurs when the data to be accessed is not in the main memory. When a page fault occurs, the operating system accesses the corresponding data in the disk and brings it to the main memory.


Question 22) What is page replacement? state the page replacement algorithms.

Answer) If all the frames in the main memory are already occupied, and if there is no empty frame for the required page, then one of the existing pages must be removed from the main memory. Only then, the new page can be swapped into the main memory. To decide which frame is to be replaced, page replacement algorithms are used.

The following are the different page replacement algorithms:


  • FIFO – First In First Out

  • In FIFO, whenever a page fault occurs, the page which was swapped into the main memory first, is replaced first.

  • It is similar to a queue.


  • LRU – Least Recently Used

  • When a page fault occurs, the page which has not been recently referred to is replaced.


  • In optimal page replacement, when a page fault occurs, the page which will not be used in the near future will be swapped out of memory.


Question 23) What do you understand by fixed and proportional allotment of frames?

Answer) Fixed allocation

It leads to wastage of memory because of allocation of many frames to a small process.

Proportional allocation

In proportional allocation of frames, the number of frames allocated to the processes is according to the process size. The total number of frames in the memory is equal to the sum of the sizes of all the processes. In proportional allocation, wastage of memory is much lesser than that in fixed allocation.


Question 24) Write a short note on the following:

Answer) PAGING

Paging is a memory management technique in which the main memory (or physical memory) is divided into units called ‘frames’. The virtual memory is divided into ‘pages’. The pages are mapped to the frames by the Memory Management Unit. The paging technique enables the non-contiguous allocation of physical memory to the processes.

Paging in CAO class notes


In segmentation, a process is divided into many parts called segments. The segments are based on the user’s view of the process.

Segmentation in CAO class notes


Virtual memory is used to create an illusion to the users of the memory to be larger than it actually is. The virtual memory can be addressed in the same way as that of the main memory. It is implemented using both hardware and software. The addressing scheme of the system limits the size of the virtual memory.


The two main cache write policies are:

  • Write-through policy

In write-through cache, the data updation is done both in the cache memory and the main memory simultaneously.

  • Write-back policy

The data modification is done only in the cache memory. The modified data is updated to the main memory only when the data in the cache memory has to be removed.


The memory hierarchy is the design which consists of different memory devices. The memory devices are arranged in the order of their response time, cost, capacity and performance. The memory hierarchy pyramid is given below:


Question 25) What do you understand by associative memory?

Answer) In associative memory, the contents of the memory are searched by using the contents of the data rather than by using the memory address. When a match occurs, the memory address of the searched data is returned. If there is no match, it means that the data being searched is not in the memory.

The associative memory is also called content addressable memory. It is more expensive than the conventional memory devices.

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